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rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a OP292/op492 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ? analog devices, inc., 2002 features dual/quad single-supply operational amplifiers single-supply operation: 4.5 v to 33 v input common-mode includes ground output swings to ground high slew rate: 3 v/ s high gain bandwidth: 4 mhz low input offset voltage high open-loop gain no phase inversion low cost applications disk drives mobile phones servo controls modems and fax machines pagers power supply monitors and controls battery-operated instrumentation general description the OP292/op492 are low cost, general purpose dual and quad operational amplifiers designed for single-supply applications and are ideal for 5 olt systems. fabricated on analog devices?cbcmos process, the OP292/ op 492 series has a pnp input stage that allows the input voltage range to include ground. a bicmos output stage enables the output to swing to ground while sinking current. the OP292/op492 series is unity-gain stable and features an outstanding combination of speed and performance for single- or dual-supply operation. the OP292/op492 provide high slew rate, high bandwidth, with open-loop gain exceeding 40,000 and offset voltage under 800 (OP292) and 1 mv (op492). with these combinations of features and low supply current, the OP292/op492 series is an excellent choice for battery-operated applications. the OP292/op492 series performance is specified for single- or dual-supply voltage operation over the extended industrial tem- perature range (?0 c to +125 c). package options for the OP292 and op492 include plastic dip, so-8 (OP292) and so-14. pin connections 8-lead narrow-body soic 8-lead epoxy dip (s-suffix) (p-suffix) 1 2 3 4 8 7 6 5 OP292 1 2 3 4 8 7 6 5 OP292 v outa ina ina v inb inb outb 14-lead narrow-body soic 14-lead epoxy dip (s-suffix) (p-suffix) 4 8 7 6 5 top view (n ot to s cale ) op-292 top view (n ot to s cale ) op-292 9 10 11 1 2 3 14 13 12 op492 op492 outd ind ind v inc inc outc outa v outb 8 9 10 11 14 13 12 4 7 6 5 1 2 3 ina ina inb inb
rev. b ? OP292/op492?pecifications electrical characteristics (@ v s = 5 v, vc m = o v, v o = 2 v, t a = 25 c unless otherwise noted.) parameter symbol conditions min typ max unit input characteristics offset voltage OP292 v os 0.1 0.8 mv ?0 c t a +85 c 0.3 1.2 mv ?0 c t a + 125 c 0.5 2.5 mv op492 v os 0.1 1 mv ?0 c t a +85 c 0.3 1.5 mv ?0 c t a + 125 c 0.5 2.5 mv input bias current i b 450 700 na ?0 c t a +85 c0.7 5 2.5 m a ?0 c t a + 125 c 3.0 5.0 m a input offset current i os 750na ?0 c t a +85 c 100 700 na ?0 c t a + 125 c 0.4 1.2 m a input voltage range 0 4.0 v common-mode rejection ratio cmrr v cm = 0 v to 4.0 v 75 95 db ?0 c t a +85 c7093db ?0 c t a + 125 c6590 db large-signal voltage gain a vo r l = 10 k , v o = 0.1 v to 4 v 25 200 v/mv ?0 c t a +85 c1 0 100 v/mv ?0 c t a + 125 c5 50 v/mv offset voltage drift d v os / d t ?0 c t a + 125 c210 m v/ c long-term v os drift d v os / d tn ote 1 1 m v/month bias current drift d i b / d t ?0 c t a +85 c6 pa/ c ?0 c t a + 125 c 400 pa/ c offset current drift d i os / d t ?0 c t a +85 c 1.5 pa/ c ?0 c t a + 125 c2 pa/ c output characteristics output voltage swing high v out r l = 100 k to gnd ?0 c t a + 125 c 4.0 4.3 v r l = 2 k to gnd 3.8 4.1 v ?0 c t a + 125 c 3.7 3.9 v low v out r l = 100 k to v+ 8 20 mv ?0 c t a + 125 c122 0mv r l = 2 k to v+ 280 450 mv ?0 c t a + 125 c 300 550 mv short-circuit current limit i sc 58 ma power supply power supply rejection ratio psrr v s = 4.5 v to 30 v, v o = 2 v 75 95 db ?0 c t a + 125 c7090 db supply current per amp i sy v o = 2 v OP292, op492 0.8 1.2 ma dynamic performance slew rate sr r l = 10 k 3v/ m s ?0 c t a + 125 c12 v/ m s gain bandwidth product gbp 4 mhz phase margin m 75 degrees channel separation cs f o = 1 khz 100 db noise performance voltage noise e n p-p 0.1 hz to 10 hz 25 m v p-p voltage noise density e n f = 1 khz 15 nv/ hz current noise density i n 0.7 pa/ hz notes 1 long-term offset voltage drift is guaranteed by 1,000 hours life test performed on three independent wafer lots at 125 c with ltpd of 1.3. specifications subject to change without notice.
rev. b ? OP292/op492 electrical characteristics (@ v s = 5 v, vc m = o v, v o = 2 v, t a = 25 c unless otherwise noted.) parameter symbol conditions min typ max unit input characteristics offset voltage OP292 v os 1.0 2.0 mv ?0 c t a +85 c 1.2 2.5 mv ?0 c t a + 125 c 1.5 3 mv op492 v os 1.4 2.5 mv ?0 c t a +85 c 1.7 2.8 mv ?0 c t a + 125 c 23mv input bias current i b 375 700 na ?0 c t a + 125 c 0.5 1 m a input offset current i os 750na ?0 c t a +85 c20 100 na ?0 c t a + 125 c 0.4 1.2 m a input voltage range note 1 ?1 11 v common-mode rejection ratio cmrr v cm = 11 v 78 100 db ?0 c t a + 125 c7595 db large-signal voltage gain a vo r l = 10 k , v o = 10 v 25 120 v/mv ?0 c t a +85 c1 07 5 v/mv ?0 c t a + 125 c5 60 v/mv offset voltage drift d v os / d t ?0 c t a + 125 c410 m v/ c bias current drift d i b / d t ?0 c t a + 125 c3 pa/ c output characteristics output voltage swing v o r l = 2 k to gnd 11 12.2 v ?0 c t a + 125 c 10 11 v r l = 100 k to gnd 13.8 14.3 v ?0 c t a + 125 c 13.5 14.0 mv short-circuit current limit i sc short circuit to gnd 8 10.5 ma power supply power supply rejection ratio psrr v s = 2.25 v to 15 v 75 86 db 40 c t a + 125 c7083 db supply current per amp i sy v o = 0 v OP292, op492 1 1.4 ma dynamic performance slew rate sr r l = 10 k 2.5 4 v/ m s ?0 c t a + 125 c23 v/ m s gain bandwidth product gbp 4 mhz phase margin m 75 degrees channel separation cs f o = 1k hz 100 db noise performance voltage noise e n p-p 0.1 hz to 10 hz 25 m v p-p voltage noise density e n f = 1k hz 15 nv/ hz current noise density i n 0.7 pa/ hz notes 1 input voltage range is guaranteed by cmrr tests. specifications subject to change without notice.
rev. b OP292/op492 ? absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 v input voltage 2 . . . . . . . . . . . . . . . . . . . . . . . . ?5 v to +14 v differential input voltage 2 . . . . . . . . . . . . . . . . . . . . . . . . . . v output short-circuit duration . . . . . . . . . . . . unlimited storage temperature range p, s package . . . . . . . . . . . . . . . . . . . . . ?5 c to +150 c operating temperature range OP292/op492 p, s . . . . . . . . . . . . . . . . ?0 c to +125 c junction temperature range p, s package . . . . . . . . . . . . . . . . . . . . . ?5 c to +125 c lead temperature range (soldering, 60 sec) . . . . . . . 300 c package type ja 3 jc unit 8-pin plastic dip (p) 103 43 c/w 14-pin plastic dip (p) 83 39 c/w 8-pin soic (s) 158 43 c/w 14-pin soic (s) 120 36 c/w notes 1 absolute maximum ratings apply to both dice and packaged parts, unless other wise noted. 2 for supply voltages less than 36 v, the absolute maximum input voltage is equal to the supply voltage. 3 ja is specified for the worst-case conditions, i.e., ja is specified for device in socket for p-dip package; ja is specified for device soldered in circuit board for soic package. ordering guide model temperature range package option OP292gp * ?0 c to +125 c n-8 OP292gs ?0 c to +125 c rn-8 op492gp * ?0 c to +125 c n-14 op492gs ?0 c to +125 c rn-14 * not for new design, obsolete april 2002.
rev. b ? t ypical performance characteristics OP292/op492 input offset voltage, v os mv units 160 0 40 20 80 60 100 120 140 0.6 0.4 0.5 0.5 0.4 0.3 0.2 0.1 0 0.1 0.2 0.3 v s = 5v v cm = 0v t a = 25 c 600 op amps tpc 4. op492 input offset voltage distribution @ 5 v input offset voltage, v os mv units 240 0 2.0 120 40 0.2 80 0 200 160 1.8 1.4 1.2 1.0 1.6 0.8 0.6 0.4 v s = 15v v cm = 0v t a = 25 c 600 op amps tpc 5. op492 input offset voltage distribution @ 15 v 160 0 5.0 40 20 0.5 0 80 60 100 120 140 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 units v s = 5v v cm = 0v 40 c t a 125 c 600 op amps tcv os ? v/ c tpc 6. op492 temperature drift (tcv os ) distribution @ 5 v 200 0 50 25 100 75 125 150 175 units 500 400 500 400 300 200 100 0 100 200 300 input offset voltage, v os v v s = 5v v cm = 0v t a = 25 c 720 op amps tpc 1. OP292 input offset voltage distribution @ 5 v 320 0 80 40 160 120 200 240 280 units 2.0 0.2 01.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 input offset voltage, v os mv v s = 15v v cm = 0v t a = 25 c 720 op amps tpc 2. OP292 input offset voltage distribution @ 15 v 160 0 40 20 80 60 100 120 140 units 4.0 0.4 03.6 3.2 2.8 2.4 2.0 1.6 1.2 0.8 tcv os ? v/ c v s = 5v v cm = 0v 40 c t a 125 c 600 op amps tpc 3. OP292 temperature drift (tcv os ) distribution @ 5 v
rev. b OP292/op492 ? tcv os v/ c units 240 0 8 60 30 1 0 120 90 150 180 210 7 6 5 4 3 2 v s = 5v v cm = 0v 40 c ta 125 c 600 op amps tpc 7. OP292 temperature drift (tcv os ) distribution @ 15 v 125 25 50 100 50 25 075 temperature c open-loop gain ? v/mv v s = 5v v o = 4v r l = 2k r l = 10k 600 0 300 100 200 500 400 tpc 8. OP292 open-loop gain vs. temperature @ 5 v 250 0 125 150 50 25 100 50 200 100 75 50 25 0 temperature c open-loop gain v/mv v s = 15v v o = 10v r l = 10k r l = 2k tpc 9. OP292 open-loop gain vs. temperature @ 15 v 200 0 8 50 25 1 0 100 75 125 150 175 7 6 5 4 3 2 tcv os v/ c units v s = 15v v cm = 0v 40 c t a 125 c 600 op amps tpc 10. op492 temperature drift (tcv os ) distribution @ 15 v 900 0 125 200 100 25 50 300 400 500 600 700 800 100 75 50 25 0 temperature c v s = 5v v o = 4v open-loop gain ? v/mv r l = 2k r l = 10k tpc 11. op492 open-loop gain vs. temperature @ 5 v 125 25 50 100 75 50 25 0 temperature ? c open-loop gain ? v/mv 400 0 100 50 200 150 250 300 350 v s = 15v v o = 10v r l = 2k r l = 10k tpc 12. op492 open-loop gain vs. temperature @ 15 v
rev. b OP292/op492 ? temperature c 1.4 0.2 125 0.8 0.4 25 0.6 50 1.2 1.0 100 50 25 075 supply current per amplifier ma v s = 15v v s = +5v tpc 13. OP292 supply current per amplifier vs. temperature temperature c 6 0 125 3 1 25 2 50 5 4 100 50 25 075 slew rate v/s v s = 15v v o = 10v sr v s = 5v v o = 0.1v, 4v sr sr sr tpc 14. OP292 slew rate vs. temperature 90 40 10 10k 10m 1m 100k 1k 50 60 70 80 0 10 20 30 frequency hz gain db t a = 25 c v = 5v v = 0v r l = 10k phase margin = 83 gain phase 135 90 45 0 45 phase degrees tpc 15. OP292/op492 open-loop gain and phase vs. frequency @ 5 v temperature c 1.4 0.2 125 0.8 0.4 25 0.6 50 1.2 1.0 100 50 25 075 supply current per amplifier ma v s = 15v v s = 5v tpc 16. op492 supply current per amplifier vs. temperature temperature c 125 25 50 100 50 25 075 6 0 3 1 2 5 4 slew rate v/s v s = 15v v o = 10v sr sr v s = 5v v o = 0.1v, 4v sr sr tpc 17. op492 slew rate vs. temperature 10k 10m 1m 100k 1k frequency hz 135 90 45 0 45 phase degrees 90 40 10 50 60 70 80 0 10 20 30 gain db gain phase phase margin = 92 t a = 25 c v s = 10k r l = 10k tpc 18. OP292/op492 open-loop gain/phase vs. frequency @ 15 v
rev. b OP292/op492 ? 50 20 10 10 0 30 40 closed-loop gain db 10k 10m 1m 100k 1k frequency ? hz t a = 25 c v = 5v v = 0v tpc 19. OP292/op492 closed-loop gain/phase vs. frequency @ 5 v 120 60 0 1k 1m 100k 10k 100 40 20 80 100 frequency hz common-mode rejection db t a = 25 c v = 5v v = 0v tpc 20. OP292/op492 cmr vs. frequency @ 5 v 1k 1m 100k 10k 100 frequency ? hz 120 60 0 40 20 80 100 power supply rejection db t a = 25 c v s = 5v tpc 21. OP292/op492 psr vs. frequency @ 5 v 50 20 10 10k 10m 1m 100k 1k frequency ? hz 10 0 30 40 closed-loop gain db t a = 25 c v s = 15v tpc 22. OP292/op492 closed-loop gain/phase vs. frequency @ 15 v 120 60 0 40 20 80 100 common-mode rejection db 1k 1m 100k 10k 100 frequency hz t a = 25 c v s = 15v tpc 23. OP292/op492 cmr vs. frequency @ 15 v 120 60 0 1k 1m 100k 10k 100 40 20 80 100 frequency ? hz power supply rejection ? db t a = 25 c v s = 15v psrr psrr tpc 24. OP292/op492 psr vs. frequency @ 15 v
rev. b OP292/op492 ? 4.8 3.8 125 4.4 4.0 25 4.2 50 4.6 100 75 50 25 0 temperature ? c output voltage swing v r l = 100k r l = 10k r l = 2k v s = 5v tpc 25. OP292/op492 v out swing vs. temperature @ 5 v 10.0 1.0 0.1 5.0 0.5 2.0 0.2 50 25 0 25 50 75 100 125 temperature c input bias current a v s = 5v v cm = 0v op492 OP292 tpc 26. OP292/op492 input bias current vs. temperature @ 5 v 140 120 0 100 80 60 40 20 010 100k 10k 1k 100 frequency ? hz v s = 5v, 15v r l = 2k v o = 3vp?p tpc 27. OP292/op492 channel separation 15.0 15.0 125 14.0 14.5 225 250 11.0 10.0 12.0 13.0 14.0 100 75 50 25 0 temperature ? c output swing v output swing ? v r l = 100k r l = 10k r l = 2k r l = 2k r l = 10k r l = 100k v s = 15v tpc 28. OP292/op492 v out swing vs. temperature @ 15 v 600 0 300 100 200 500 400 125 25 50 100 50 25 075 temperature c input bias current na v s = 15v v cm = 0v op492 OP292 tpc 29. OP292/op492 input bias current vs. temperature @ 15 v 0.50 0.18 0.26 0.22 0.34 0.30 0.38 0.42 0.46 0.48 0.24 0.20 0.32 0.28 0.36 0.40 0.44 rail rail +15v ?15v a v 15 113 11 9 7 5 3 2 014 12 10 8 6 4 vin ? v ib ? na in tpc 30. OP292/op492 i b current vs. common-mode voltage
rev. b OP292/op492 ?0 100dv/div mkr: 16.9 v/ hz 25 khz bw: 150 hz 0hz mkr: 1000 hz ch a: 800dv fs tpc 31. voltage noise density application information phase reversal the op492 has built-in protection against phase reversal when the input voltage goes to either supply rail. in fact, it is safe for the input to exceed either supply rail by up to 0.6 v with no risk of phase reversal. however, the input should not go beyond the positive supply rail by more than 0.9 v, otherwise the output will reverse phase. if this condition can occur, the problem can be fixed by adding a 5 k current limiting resistor in series with the input pin. with this addition, the input can go to more than 5 v beyond the positive rail without phase reversal. an input voltage that is as much as 5 v below the negative rail will not result in phase reversal. op492 2k 5v ov 11.8v p-p 10 90 100 0% 1v 5s figure 1. output phase reverse if input exceeds the posi- tive supply (v+) by more than 0.9 v op492 2k 5v ov 10v p-p 10 90 100 0% 1v 5s 10 90 100 0% 1v 5s figure 2. no negative rail phase reversal, even with input signal at 5 v below ground power supply considerations the OP292/op492 are designed to operate equally well at single 5 v or 15 v supplies. the lowest supply voltage recommended is 4.5 v. it is a good design practice to bypass the supply pins with a 0.1 m f ceramic capacitor. it helps improve filtering of high frequency noise. for dual supply operation, the negative supply (v? must be applied at the same time, or before v . if v is applied before v? or in the case of a loss of v?supply, while either input is connected to ground or other low impedance source, excessive input current may result. potentially damaging levels of input current can de- stroy the amplifier. if this condition can exist, simply add a l k or larger resistor in series with the input to eliminate the problem. typical applications direct access arrangement for telephone line interface figure 3 shows a 5 v- only transmit/receive telephone line inter- face for a modem circuit. it allows full duplex transmission of modem signals on a transformer-coupled 600 v line in a differential man- ner. the transmit section gain can be set for the specific modem device output. similarly the receive amplifier gain can be appro- priately selected based on the modem device input requirements. the circuit operates on a single 5 v supply. the standard value resistors allow the use of a sip-packaged resistor array; coupled with a quad op amp in a single package, this offers a compact, low part-count solution. 50k 5v dc 6.2v 6.2v t1 1:1 to telephone line 0.1 f 50k 10 f modem tx gain adjust rx gain adjust 0.1 f 300k 20k 20k 20k 20k 20k 20k 20k 0.1 f 20k 100pf 5k 5k 1/4 op492 1/4 op492 1/4 op492 5v transmit txa receive rxa 300k figure 3. a universal direct access arrangement for telephone line interface a single-supply instrumentation amplifier a low-cost, single-supply instrumentation amplifier can be built as shown in figure 4. the circuit utilizes two op amps to form a high-input impedance differential amplifier. gain can be set by selecting resistor r g which can be calculated using the transfer function equation. normally, v reference is set to 0 v. then the output voltage is a function of the gain times the differential input
rev. b OP292/op492 ?1 voltage. however, the output can be offset by setting v reference from 0 v to 4 v, as long as the input common-mode voltage of the amplifier is not exceeded. v in v ref 8 v out 5v 7 4 1 5 v out = 5 40k r g + v ref 20k 5k 20k 5k r g 1/2 OP292 1/2 OP292 figure 4. a single-supply instrumentation amplifier in this configuration, while the output can swing to near zero volts, one needs to be careful because the input? common-mode voltage range cannot operate to zero volts. this is because of the limitation of the circuit configuration where the first amplifier must be able to swing below ground in order to attain a 0 v common-mode voltage, which it cannot do. depending on the gain of the instrumentation amplifier, the input common-mode extends to within about 0.3 v of zero. one can easily calculate the worst-case common-mode limit for a given gain. dac output amplifier the OP292/op492 are ideal for buffering the output of single- supply d/a converters. figure 5 shows a typical amplifier used to buffer the output of a cmos dac that is connected for single- supply operation. to do that, the normally current output 12-bit cmos dac (r-2r ladder type) is connected backward to pro- duce a voltage output. this operating configuration necessitates a low voltage reference. in this case, a 1.235 v low-power reference is used. the relatively high output impedance (10 k ) is buffered by the OP292 and at the same time gained up to a much more usable level. the potentiometer provides an accurate gain trim for a 4.095 v full-scale, allowing 1mv increment per lsb of control resolution. the dac8043 device comes in an 8-pin dip package providing a cost-effective, compact solution to a 12-bit analog channel. v dd clk sri 1 2 3 4 8 7 6 5 da c8043 5v 5v 5v 7.5k 1.235v ad589 nc digital control ld sri clk 500k 8.45k v out 20k 1/2 OP292 1mv/lsb 0v 4.095v fs v ref v fb t 0 vnd ld sri clk v dd figure 5. a 12-bit single-supply dac with serial bus control a 50 hz/60 hz single-supply notch filter figure 6 shows a notch filter that achieves nearly 30 db of 60 hz rejection while powered by only a single 12 v supply. the circuit also works well on 5 v systems. the filter utilizes a twin-t configu- ration whose frequency selectivity depends heavily on the relative matching of the capacitors and resistors in the twin-t section. mylar is a good choice for the twin-t? capacitors, and the relative matching of the capacitors and resistors determines the filter? passband symmetry. using 1% resistors and 5% capacitors produces satisfactory results. the amount of rejection and the q of the filter is solely determined by one resistor, and is shown in the table. t he bottom amplifier is used to split the supply to bias the amplifier to midlevel. the circuit can be modified to reject 50 hz by simply changing the resistors in the twin-t section (rl through r4) from 2.67 k to 3.16 k , and changing r5 to 12 of 3.16 k . for best results, the common value resistors can be from a resistor array for opti- mum matching characteristics. 1/4 op492 c1 1 f c3 2 f (1 f 2) r5 1.335k (2. 67k 2) r4 2.67k c2 1 f r6 100k r q 8k 12v 12v r8 100k r9 100k c4 1 f 6v r7 1k r2 2.67k v out v in note for 50hz application change r12 r4 to 3.16k and r5 to 1.58k (3.16k 2) filter q 0.75 1.00 1.25 2.50 5.00 10.00 r q (k ) 1.0 2.0 3.0 8.0 18 38 rejection (db) 40 35 30 25 20 15 voltage gain 1.33 1.50 1.60 1.80 1.90 1.95 1/4 op492 1/4 op492 r3 2.67k r1 2.67k figure 6. a single-supply 50 hz/60 hz notch filter v out 5v 5k 5k 1.78k 16.2k 100 f 2 3 1 8 4 6 5 7 5v v in 1.1k 14.3k 0.01 f 0.022 f 3300pf 2200pf 1/2 OP292 1/2 OP292 figure 7. a 4-pole bessel low-pass filter using sallen-key topology a 4-pole bessel low-pass filter the linear phase filter in figure 7 is designed to roll off at a voiceband cutoff frequency of 3.6 khz. the 4 poles are formed by two cascading stages of two-pole sallen-key filters.
rev. b OP292/op492 ?2 a low-cost, linearized thermistor amplifier an inexpensive thermometer amplifier circuit can be implemented using low-cost thermistors. one such implementation is shown in figure 8. the circuit measures temperature over the range of 0 c to 70 c to an accuracy of 0.3 c as the linearization circuit works well within a narrow temperature range. however, it can measure higher temperature but at a slightly reduced accuracy. to achieve the aforementioned accuracy, the thermistor? nonlinearity must be corrected. this is done by connecting the thermistor in parallel with the 10 k in the feedback loop of the first stage amplifier. a constant operating current of 281 a is supplied by the resistor r1 with the 5 v reference from the ref-195 such that the thermistor? self-heating error is kept below 0.1 c. in many cases, the thermistor is placed some distance from the signal conditioning circuit. under this condition, a 0.1 m f capacitor placed across r2 will help to suppress noise pickup. this linearization network creates an offset voltage that is cor- rected by summing a compensating current with potentiometer p1. the temperature dependent signal is amplified by the second stage, producing a transfer coefficient of ?0 mv/ c at the output. to calibrate, a precision decade box can be used in place of the thermistor. for 0 c trim, the decade box is set to 32.650 k , and p1 is adjusted until the circuit? output reads 0 v. to trim the circuit at the full-scale temperature of 70 c, the decade box is then set to 1.752 k and p2 is adjusted until the circuit reads ?.70 v. ref195 15v 5v 1 figure 8. a low cost linearized thermistor amplifier a single-supply ultrasonic clamping/limiting receiver amplifier figure 9 shows an ultrasonic receiver amplifier using the non- linear impedance of low-cost diodes to effectively control the gain for wide dynamic range. this circuit amplifies a 40 khz ultrasonic signal through a pair of low-cost clamping amplifiers before feeding a band-pass filter to extract a clean 40 khz signal for processing. the signal is ac-coupled into the false-ground bias node by virtue of the capacitive piezoelectric sensing element. rather than using an amplifier to generate a supply splitting bias, the false ground voltage is generated by a low-cost resistive voltage divider. each amplifier stage provides ac gain while passing on the dc self- bias. as long as the output signal at each stage is less than a diode? forward voltage, each amplifier has unrestricted gain to amplify low level signals. however, as the signal strength increases, the feedback diodes begin to conduct, shunting the feedback current, and thus reducing the gain. although distorting the waveform, the diodes effectively maintain a relatively constant amplitude even with large signals that otherwise would saturate the amplifier. in addition, this design is considerably more stable than the feed- back type agc. the overall circuit has a gain range from ? to ?00, where the inversion comes from the band-pass filter stage. operating with a q of 5, the filter restores a clean, undistorted signal to the out- put. the circuit also works well with 5 v supply systems. 12v 600k f igure 9. a 40 khz ultrasonic clamping/limiting receiver amplifier precision single-supply voltage comparator the OP292/op492 have excellent overload recovery characteris- tics, making them suitable for precision comparator applications. figure 10 shows the saturation recovery characteristics of the op492. the amplifier exhibits very little propagation delay. the amplifier compares a signal precisely to less than 0.5 mv offset error. 10 90 100 0% 1v 5s 5v 2k figure 10. the op492 has fast overload recovery for comparator applications programmable precision window comparator the OP292/op492 can be used for precise level detection such as in test equipment where a signal is measured within a range. figure 11 shows such an implementation. the threshold voltage level is set by a pair of 12-bit dia converters. the dacs have serial interface thus minimizing interconnection requirements. the dac85 12 has a control resolution of 1 mv/bit. thus for 5 v supply operation, maximum dac output is 4.095 v. however, the OP292 will accept a maximum input of 4.0 v.
rev. b OP292/op492 ?3 1 2 3 4 8 7 6 5 dac 8512 1 2 3 4 8 7 6 5 dac 8512 decode control ref dac address clk sdi ld analog input clr control ref dac 5v 5v 2 3 6 5 7 low high 8 4 1 5v 1/2 OP292 1/2 OP292 figure 11. programmable window comparator with 12-bit threshold level control
rev. b OP292/op492 ?4 * OP292 spice macro-model rev. b, 6/93 * arg / pmi * * copyright 1993 by analog devices * * refer to ?eadme.doc?file for license statement. use of * this model indicates your acceptance of the terms and provisions * in the license statement. * * node assignments * noninverting input * inverting input * positive supply * negative supply * output * .subckt OP292 2 1 99 50 34 * * input stage and pole at 40 mhz * il 99 4 5oe-6 ios 2 l 10e-9 eos 2 3 poly(l) (21,30) 1.5e-3 75 cin 1 2 3e-12 q1 5 1 7 qp q2 6 3 8 qp r3 5 50 2e3 r4 6 50 2e3 r5 4 7 966 r6 4 8 966 c1 5 6 .995e12 * * gain stage * eref 98 0 (30,0) 1 g1 98 9 (5,6) 5ooe-6 r7 9 98 210.819e3 d1 9 10 dx d2 11 9 dx v1 99 10 .6 v2 11 50 .6 * * zero/pole at 6 mhz/12 mhz * e1 12 98 (9,30) 2 r8 12 13 1 r9 13 98 1 c3 12 13 26.526e-9 * * zero at 15 mhz * e2 14 98 (13,30) le6 r10 14 15 1e6 r11 15 98 1 c4 14 15 10.610e-15 * * common-mode stage with zero at 40 khz * ecm 20 98 poly(2) (1,30) (2,30) 0 0.5 0.5 r20 20 21 1e6 r21 21 98 1 c5 20 21 3.979e-12 *
rev. b OP292/op492 ?5 * pole at 100 mhz * g2 98 16 (15,30) 1 r12 16 98 1 c6 16 98 1.592e-9 * * output stage * rs1 99 30 1e6 rs2 30 50 1e6 isy 99 50 .44e-3 g3 31 50 poly(1) (16,30) -1.635e-6 4e-6 r16 31 50 1e6 dcl 50 31 dz i2 99 32 250e-6 rcl 33 50 56 m1 32 31 50 50 mn l=9e-6 w=1000e-6 ad=15e-as=15e-9 m2 34 31 50 50 mn l=9e-6 w=1oooe-6 ad=15e-9 as=15e-9 cc 31 32 14e-12 q3 99 32 34 qna q4 33 32 34 qpa q5 31 33 50 qna .model qna npn(is=1.19e-16 bf=253 nf=0.99 vaf=193 ikf=2.76e-3 + ise=2.57e-13 ne=5 br=0.4 nr=0.988 var=15 ikr=1.465e-4 + isc=6.9e-16 nc=0.99 rb=2.0e3 irb=7.73e-6 rbm= 132.8 re=4 rc=209 + cje=2.1e-13 vje=0.573 mje=0.364 fc=0.5 cjc=1.64e-13 vjc=0.534 mjc=0.5 + cjs=1.37e-12 vjs=0.59 mjs=0.5 tf=0.43e-9 ptf=30) .model qpa pnp(is=5.21e-17 bf=131 nf=0.99 vaf=62 ikf=8.35e-4 + ise= 1.09e-14 ne=2.61 br=0.5 nr=0.984 var= 15 ikr=3.96e-5 + isc=7.58e-16 nc=0.985 rb=1.52e3 irb=1.67e-5 rbm=368.5 re=6.31 rc=354.4 + cje=l.le-13 vje=0.745 mje=0.33 fc=0.5 cjc=2.37e-13 vjc=0.762 mjc=0.4 + cjs=7.11e-13 vjs=0.45 mjs=0.412 tf=l.oe-9 ptf=30) .model mn nmos(level=3 vto=1.3 rs=0.3 rd=0.3 + tox=8.5e-8 ld=1.48e-6 wd=1e-6 nsub=1.53e16 uo=650 delta=10 vmax=2e5 + xj=1.75e-6 kappa=0.8 eta=0.066 theta=0.01 tpg=1 cj=2.9e-4 pb=0.837 + mj=0.407 cjsw=0.5e-9 mjsw=0.33) .model qp pnp(bf=61.5) .model dx d .model dz d(bv=3.6) .ends OP292
rev. b OP292/op492 ?6 * op492 spice macro-model rev. b, 6/93 * arg / pmi * * copyright 1993 by analog devices * * refer to ?eadme.doc?file for license statement. use of * this model indicates your acceptance of the terms and pro- * visions in the license statement. * * node assignments * noninverting input * inverting input * positive supply * negative supply * output .subckt op492 2 1 99 50 34 * * input stage and pole at 40 mhz i1 99 4 50e-6 ios 2 1 10e-9 eos 2 3 poly(1) (21,30) 1.5e-3 75 cin 1 2 3e-12 q1 517qp q2 638qp r3 5 50 2e3 r4 6 50 2e3 r5 4 7 966 r6 4 8 966 c1 5 6 .995e-12 * * gain stage * * eref 98 0 (30,0) 1 g1 98 9 (5,6) 500e-6 r7 9 98 210.819e3 d1 9 10 dx d2 11 9 dx v1 99 10 .6 v2 11 50 .6 * * zero/pole at 6 mhz/12 mhz * e1 12 98 (9,30) 2 r8 12 13 1 r9 13 98 1 c3 12 13 26.526e-9 * * zero at 15 mhz * e2 14 98 (13,30) 1e6 r10 14 15 1e6 r11 15 98 1 c4 14 15 10.610e-15 * * common-mode stage with zero at 40 khz * ecm 20 98 poly(2) (1,30) (2,30) 0 0.5 0.5 r20 20 21 1e6 r21 21 98 1 c5 20 21 3.979e-12
rev. b OP292/op492 ?7 * pole at 100 mhz * g2 98 16 (15,30) 1 r12 16 98 1 c6 16 98 1.592e-9 * * output stage * rs1 99 30 1 e6 rs2 30 50 1e6 isy 99 50 .44e-3 g3 31 50 poly(1) (16,30) ?.635e-6 4e-6 r16 31 50 1e6 dcl 50 31 dz i2 99 32 250e-6 rcl 33 50 56 m1 32 31 50 50 mn l=9e-6 w=1oooe-6 ad=15e-9 as=15e-9 m2 34 31 50 50 mn l=9e-6 w=1oooe-6 ad=15e-9 as=15e-9 cc 31 32 14e-12 q3 99 32 34 qna q4 33 32 34 qpa q5 31 33 50 qna .model qna npn(is=1.19e-16 bf=253 nf=0.99 vaf=193 ikf=2.76e-3 + ise=2.57e-13 ne=5 br=0.4 nr=0.988 var=15 ikr=1.465e-4 + isc=6.9e-16 nc=0.99 rb=2.0e3 irb=7.73e-6 rbm=132.8 re=4 rc=209 + cje=2.1e-13 vje=0.573 mje=0.364 fc=0.5 cjc=1.64e-13 vjc=0.534 mjc=0.5 + cjs=1.37e-12 vjs=0.59 mjs=0.5 tf=0.43e-9 ptf=30) .model qpa pnp(is=5.21e-17 bf=131 nf=0.99 vaf=62 ikf=8.35e-4 + ise=1.09e-14 ne=2.61 br=0.5 nr=0.984 var=15 ikr=3.96e-5 + isc=7.58e-16 nc=0.985 rb=1.52e3 irb=1.67e-5 rbm=368.5 re=6.31 rc=354.4 + cje=l.le-13 vje=0.745 mje=0.33 fc=0.5 cjc=2.37e-13 vjc=0.762 mjc=0.4 + cjs=7.11e-13 vjs=0.45 mjs=0.412 tf=1.oe-9 ptf=30) .model mn nmos(level=3 vto=1.3 rs=0.3 rd=0.3 + tox=8.5e-8 ld=1.48e-6 wd=1e-6 nsub=1.53e16 uo=650 delta=10 vmax=2e5 + xj=1.75e-6 kappa=0.8 eta=0.066 theta=0.01 tpg=1 cj=2.9e-4 pb=0.837 + mj=0.407 cjsw=0.5e-9 mjsw=0.33) .model qp pnp(bf=61.5) .model dx d .model dz d(bv=3.6) .ends op492
rev. b OP292/op492 ?8 outline dimensions 8-lead standard small outline package [soic] narrow body (rn-8) dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.19 (0.0075) 1.27 (0.0500) 0.41 (0.0160) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 85 4 1 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.33 (0.0130) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012aa 8-lead plastic dual-in-line package [pdip] (n-8) dimensions shown in inches and (millimeters) seating plane 0.015 (0.38) min 0.180 (4.57) max 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 8 1 4 5 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.100 (2.54) bsc 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) controlling dimensions are in inches; millimeters dimensions (in parentheses) compliant to jedec standards mo-095aa 14-lead plastic dual-in-line package [pdip] (n-14) dimensions shown in inches and (millimeters) 14 1 7 8 0.685 (17.40) 0.665 (16.89) 0.645 (16.38) 0.295 (7.49) 0.285 (7.24) 0.275 (6.99) 0.100 (2.54) bsc seating plane 0.180 (4.57) max 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) min controlling dimensions are in inch; millimeters dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards mo-095-ab 14-lead standard small outline package [soic] narrow body (rn-14) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design coplanarity 0.10 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.33 (0.0130) 1.75 (0.0689) 1.35 (0.0531) 8 0 0.50 (0.0197) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.19 (0.0075) revision history location page 10/02 - change from rev. a to rev. b edits to outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 1/02 - change from rev. 0 to rev. a deleted wafer test limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 deleted dice characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 edits to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
?9
?0 c00310-0-10/02 (b) printed in u.s.a.

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